Through-Silicon Vias Modeling and Testing


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Through-Silicon Vias Modeling and Testing
101060810307001031600 Through-Silicon Vias Modeling and Testing
Introduction TSVs (through-silicon vias) are the heart of 3D IC and Si integration. In this chapter, the electrical, thermal, and mechanical modeling and testing of TSVs are presented and discussed.
Electrical Modeling of TSVs In this section, the electrical performance of a generic TSV structure for high-frequency 3D IC integration applications is presented. Emphasis is …
Citation
John H. Lau, Ph.D.: 3D IC Integration and Packaging. Through-Silicon Vias Modeling and Testing, Chapter (McGraw-Hill Professional, 2016), AccessEngineering Export